Vorliegende Sprache |
eng |
Hinweise auf parallele Ausgaben |
337164894 Buchausg. u.d.T.: ‡Design of digital systems and devices |
ISBN |
978-3-642-17544-2 |
Name |
Adamski, Marian |
Barkalov, Alexander |
Name ANZEIGE DER KETTE |
Barkalov, Alexander |
Name |
Wegrzyn, Marek |
T I T E L |
Design of Digital Systems and Devices |
Verlagsort |
Berlin, Heidelberg |
Verlag |
Springer Berlin Heidelberg |
Erscheinungsjahr |
2011 |
2011 |
Umfang |
Online-Ressource (XVIII, 366p. 195 illus, digital) |
Reihe |
Lecture Notes in Electrical Engineering ; 79 |
Notiz / Fußnoten |
Includes bibliographical references and index |
Weiterer Inhalt |
Title; Contents; Part I System Design; Digital System Design; Main Processor Units and Instruction Sets; Main Units; Instruction Set and Instruction Formats; Addressing Modes; ASMs for Processor Instructions; Data Path Design; Combined Functional ASM; Process Table and Connection Graph; Graph of Incompatibility. Main MUXes and Direct Connections; Control Unit Design; Transformation of Functional ASM into Structural ASM; Synthesis the Finite State Machine (FSM) from ASM; Synthesis of Control Unit (FSM) for Processor; Encoding of Inputs of MUXes; Conclusions; References. Rectangular Function Π(x) and Its Application for Description of Some Logical Devices OperationIntroduction; Logic Operations on Rectangular Functions; Utilization of the Rectangular Functions Π(x) for Analysis of Pulse or Frequency Multiplying; Utilizing the Function Π(x) for Harmonic Analysis of Digital Sine Wave Generator; Digital Sine Wave Generator Based on Digital Integrators; Digital Sine Wave Generator Based on ROM; Conclusions; References; Design and Application of the PLD-Based Reconfigurable Devices; Introduction; Evolution of Computer Systems. Architecture and Structure of PLD-Based Computer SystemsAdaptive Logical Network (ALN); Problem-Oriented Structures of Digital Devices; Functional Blocks with a Floating Point; Functional Blocks for Multiplication of Matrixes; Designing and Realization of Median Filters; Hemming Adder Realization; Verification of Projects by Means of Stands; Reconfigurable Processors; Conclusions; References; Application of Multilevel Design on the Base of UML for Digital System Developing; Introduction; Features of Digital Systems for Real-Time Image Generation. Estimation of the Complexity of the Standard Rendering PipelineThe Architectural Decisions and Algorithm Approaches for the Real-Time Rendering Systems; Designing of Specialized Processors; Scene Processor; Clipping Processor; Application of Runtime Reconfiguration; Application of UML for HDL-Code Creation; Example for 2D Clipping Realization; Fragment of HDL for Scene Processor Simulation; Summary and Future Directions; References; Part II Digital Design with Programmable Logic; Logic Synthesis Method of Digital Circuits Designed for Implementation with Embedded Memory Blocks of FPGAs. IntroductionDecomposition of Boolean Functions; Functional Decomposition; Decomposition into EMB Blocks; Parallel Decomposition; Balanced Decomposition; Sequential Circuits Synthesis; Basic Information; Implementation of Finite State Machines in FPGA's; States Encoding; Construction of Partition PG; Application of the Method; Experimental Results; Conclusions; References; Efficient Technology Mapping Method for PAL-Based Devices; Introduction; Theoretical Backgrounds; Technology Mapping Algorithm; Experimental Results; Conclusions; References. Reliable FPGA-Based Systems Out of Unreliable Automata: Multi-version Design Using Genetic Algorithms |
Titelhinweis |
Buchausg. u.d.T.: ‡Design of digital systems and devices |
ISBN |
ISBN 978-3-642-17545-9 |
Klassifikation |
TJFC |
TEC008010 |
*68-06 |
94-06 |
68U07 |
94A12 |
94C10 |
00B15 |
621.3815 |
621.392 |
TK7888.4 |
ZN 5600 |
Kurzbeschreibung |
Logic design of digital devices is a very important part of the Computer Science. It deals with design and testing of logic circuits for both data-path and control unit of a digital system. Design methods depend strongly on logic elements using for implementation of logic circuits. Different programmable logic devices are wide used for implementation of logic circuits. Nowadays, we witness the rapid growth of new and new chips, but there is a strong lack of new design methods. This book includes a variety of design and test methods targeted on different digital devices. It covers methods of digital system design, the development of theoretical base for construction and designing of the PLD based devices, application of UML for digital design. A considerable part of the book is devoted to design methods oriented on implementing control units using FPGA and CPLD chips. Such important issues as design of reliable FSMs, automatic design of concurrent logic controllers, the models and methods for creating infrastructure IP services for the SoCs are also presented. The editors of the book hope that it will be interesting and useful for experts in Computer Science and Electronics, as well as for students, who are viewed as designers of future digital devices and systems. |
1. Schlagwortkette |
Digitales System |
Systementwurf |
CAD |
UML |
Programmierbare logische Anordnung |
Aufsatzsammlung |
1. Schlagwortkette ANZEIGE DER KETTE |
Digitales System -- Systementwurf -- CAD -- UML -- Programmierbare logische Anordnung -- Aufsatzsammlung |
2. Schlagwortkette |
Digitalschaltung |
Logiksynthese |
Programmierbare logische Anordnung |
2. Schlagwortkette ANZEIGE DER KETTE |
Digitalschaltung -- Logiksynthese -- Programmierbare logische Anordnung |
3. Schlagwortkette |
Digitaltechnik |
Testen |
Fehlersimulation |
Fehlererkennung |
Fehlertoleranz |
3. Schlagwortkette ANZEIGE DER KETTE |
Digitaltechnik -- Testen -- Fehlersimulation -- Fehlererkennung -- Fehlertoleranz |
4. Schlagwortkette |
Digitales System |
Systementwurf |
CAD |
UML |
Programmierbare logische Anordnung |
Aufsatzsammlung |
ANZEIGE DER KETTE |
Digitales System -- Systementwurf -- CAD -- UML -- Programmierbare logische Anordnung -- Aufsatzsammlung |
5. Schlagwortkette |
Digitalschaltung |
Logiksynthese |
Programmierbare logische Anordnung |
Aufsatzsammlung |
ANZEIGE DER KETTE |
Digitalschaltung -- Logiksynthese -- Programmierbare logische Anordnung -- Aufsatzsammlung |
6. Schlagwortkette |
Digitaltechnik |
Testen |
Fehlersimulation |
Fehlererkennung |
Fehlertoleranz |
Aufsatzsammlung |
ANZEIGE DER KETTE |
Digitaltechnik -- Testen -- Fehlersimulation -- Fehlererkennung -- Fehlertoleranz -- Aufsatzsammlung |
SWB-Titel-Idn |
338110372 |
Signatur |
Springer E-Book |
Bemerkungen |
Elektronischer Volltext - Campuslizenz |
Elektronische Adresse |
$uhttp://dx.doi.org/10.1007/978-3-642-17545-9 |
Internetseite / Link |
Volltext |
Siehe auch |
Volltext |
Siehe auch |
Inhaltstext |