- Hauptmenü-

Katalogdatenanzeige

VLSI Physical Design: From Graph Partitioning to Timing Closure

Kataloginformation Katalogdatensatz500158629 .

Kataloginformation
Feldname	Details
Vorliegende Sprache	eng
Hinweise auf parallele Ausgaben	337116288 Buchausg. u.d.T.: ‡VLSI physical design
ISBN	978-90-481-9590-9
Name	Kahng, Andrew B.
Name	Lienig, Jens
ANZEIGE DER KETTE	Lienig, Jens
Name	Markov, Igor L.
Name	Hu, Jin
T I T E L	VLSI Physical Design: From Graph Partitioning to Timing Closure
Verlagsort	Dordrecht
Verlag	Springer Science+Business Media B.V
Erscheinungsjahr	2011
Erscheinungsjahr	2011
Umfang	Online-Ressource (XI, 310p. 150 illus, digital)
Reihe	SpringerLink. Bücher
Notiz / Fußnoten	Includes bibliographical references and index
Weiterer Inhalt	""Foreword""; ""Preface""; ""Table of Contents""; ""Chapter 1 Introduction""; ""1 Introduction""; ""1.1 Electronic Design Automation (EDA)""; ""1.2 VLSI Design Flow""; ""1.3 VLSI Design Styles""; ""1.4 Layout Layers and Design Rules""; ""1.5 Physical Design Optimizations""; ""1.6 Algorithms and Complexity""; ""1.7 Graph Theory Terminology""; ""1.8 Common EDA Terminology""; ""Chapter 1 References""; ""Chapter 2 Netlist and System Partitioning""; ""2 Netlist and System Partitioning""; ""2.1 Introduction""; ""2.2 Terminology""; ""2.3 Optimization Goals""; ""2.4 Partitioning Algorithms"". ""2.5 A Framework for Multilevel Partitioning""""2.6 System Partitioning onto Multiple FPGAs""; ""Chapter 2 Exercises""; ""Chapter 2 References""; ""Chapter 3 Chip Planning""; ""3 Chip Planning""; ""3.1 Introduction to Floorplanning""; ""3.2 Optimization Goals in Floorplanning""; ""3.3 Terminology""; ""3.4 Floorplan Representations""; ""3.5 Floorplanning Algorithms""; ""3.6 Pin Assignment""; ""3.7 Power and Ground Routing""; ""Chapter 3 Exercises""; ""Chapter 3 References""; ""Chapter 4 Global and Detailed Placement""; ""4 Global and Detailed Placement""; ""4.1 Introduction"". ""4.2 Optimization Objectives""""4.3 Global Placement""; ""4.4 Legalization and Detailed Placement""; ""Chapter 4 Exercises""; ""Chapter 4 References""; ""Chapter 5 Global Routing""; ""5 Global Routing""; ""5.1 Introduction""; ""5.2 Terminology and Definitions""; ""5.3 Optimization Goals""; ""5.4 Representations of Routing Regions""; ""5.5 The Global Routing Flow""; ""5.6 Single-Net Routing""; ""5.7 Full-Netlist Routing""; ""5.8 Modern Global Routing""; ""Chapter 5 Exercises""; ""Chapter 5 References""; ""Chapter 6 Detailed Routing""; ""6 Detailed Routing""; ""6.1 Terminology"". ""6.2 Horizontal and Vertical Constraint Graphs""""6.3 Channel Routing Algorithms""; ""6.4 Switchbox Routing""; ""6.5 Over-the-Cell Routing Algorithms""; ""6.6 Modern Challenges in Detailed Routing""; ""Chapter 6 Exercises""; ""Chapter 6 References""; ""Chapter 7 Specialized Routing""; ""7 Specialized Routing""; ""7.1 Introduction to Area Routing""; ""7.2 Net Ordering in Area Routing""; ""7.3 Non-Manhattan Routing""; ""7.4 Basic Concepts in Clock Networks""; ""7.5 Modern Clock Tree Synthesis""; ""Chapter 7 Exercises""; ""Chapter 7 References""; ""Chapter 8 Timing Closure"". ""8 Timing Closure""""8.1 Introduction""; ""8.2 Timing Analysis and Performance Constraints""; ""8.3 Timing-Driven Placement""; ""8.4 Timing-Driven Routing""; ""8.5 Physical Synthesis""; ""8.6 Performance-Driven Design Flow""; ""8.7 Conclusions""; ""Chapter 8 Exercises""; ""Chapter 8 References""; ""Appendix A Solutions to Chapter Exercises""; ""A Solutions to Chapter Exercises""; ""Chapter 2: Netlist and System Partitioning""; ""Chapter 3: Chip Planning""; ""Chapter 4: Global and Detailed Placement""; ""Chapter 5: Global Routing""; ""Chapter 6: Detailed Routing"". ""Chapter 7: Specialized Routing""
Titelhinweis	Buchausg. u.d.T.: ‡VLSI physical design
ISBN	ISBN 978-90-481-9591-6
Klassifikation	TJFC
	TEC008010
	*68-02
	68M99
	68R10
	68W35
	621.3815
	621.395
	TK7888.4
	ZN 4952
	ZN 5350
Kurzbeschreibung	Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. VLSI Physical Design: From Graph Partitioning to Timing Closure introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.
1. Schlagwortkette	Entwurfsautomation
ANZEIGE DER KETTE	Entwurfsautomation
SWB-Titel-Idn	337801258
Signatur	Springer E-Book
Bemerkungen	Elektronischer Volltext - Campuslizenz
Elektronische Adresse	$uhttp://dx.doi.org/10.1007/978-90-481-9591-6
Internetseite / Link	Volltext
Siehe auch	Volltext
Siehe auch	Cover
Siehe auch	Inhaltsverzeichnis
Siehe auch	Einführung/Vorwort
Siehe auch	Inhaltstext

ISBD-Anzeige Katalogdatensatz500158629

Kategorien-Anzeige Katalogdatensatz500158629

Titel zur Titelsammlung hinzufügen Katalogdatensatz500158629

Kataloginformation500158629 Datensatzanfang . Kataloginformation500158629 Seitenanfang .

Titel vormerken Katalogdatensatz500158629

Vollanzeige Katalogdaten

Auf diesem Bildschirm erhalten Sie Katalog- und Exemplarinformationen zum ausgewählten Titel.

Im Bereich Kataloginformation werden die bibliographischen Details angezeigt. Per Klick auf Hyperlink-Begriffe wie Schlagwörter, Autoren, Reihen, Körperschaften und Klassifikationen können Sie sich weitere Titel des gewählten Begriffes anzeigen lassen.

Der Bereich Exemplarinformationen enthält zum einen Angaben über den Standort und die Verfügbarkeit der Exemplare. Zum anderen haben Sie die Möglichkeit, ausgeliehene Exemplare vorzumerken oder Exemplare aus dem Magazin zu bestellen.